(gcc.info.gz) Example

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(gcc.info.gz) Patterns

(gcc.info.gz) Machine Desc

(gcc.info.gz) RTL Template

 
 Example of `define_insn'
 ========================
 
    Here is an actual example of an instruction pattern, for the
 68000/68020.
 
      (define_insn "tstsi"
        [(set (cc0)
              (match_operand:SI 0 "general_operand" "rm"))]
        ""
        "*
      { if (TARGET_68020 || ! ADDRESS_REG_P (operands[0]))
          return \"tstl %0\";
        return \"cmpl #0,%0\"; }")
 
    This is an instruction that sets the condition codes based on the
 value of a general operand.  It has no condition, so any insn whose RTL
 description has the form shown may be handled according to this
 pattern.  The name `tstsi' means "test a `SImode' value" and tells the
 RTL generation pass that, when it is necessary to test such a value, an
 insn to do so can be constructed using this pattern.
 
    The output control string is a piece of C code which chooses which
 output template to return based on the kind of operand and the specific
 type of CPU for which code is being generated.
 
    `"rm"' is an operand constraint.  Its meaning is explained below.
 

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(gcc.info.gz) Patterns

(gcc.info.gz) Machine Desc

(gcc.info.gz) RTL Template